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\bibitem{kalm16}
L.~Kalms and D.~Göhringer, ``Clustering and mapping algorithm for application
  distribution on a scalable fpga cluster,'' in \emph{2016 IEEE International
  Parallel and Distributed Processing Symposium Workshops (IPDPSW)}, 2016, pp.
  105--113.

\bibitem{jone99}
M.~Jones, L.~Scharf, J.~Scott, C.~Twaddle, M.~Yaconis, K.~Yao, P.~Athanas, and
  B.~Schott, ``Implementing an api for distributed adaptive computing
  systems,'' in \emph{Seventh Annual IEEE Symposium on Field-Programmable
  Custom Computing Machines (Cat. No.PR00375)}, 1999, pp. 222--230.

\bibitem{knod13}
O.~Knodel, A.~Georgi, P.~Lehmann, W.~E. Nagel, and R.~G. Spallek, ``Integration
  of a highly scalable, multi-fpga-based hardware accelerator in common cluster
  infrastructures,'' in \emph{2013 42nd International Conference on Parallel
  Processing}, 2013, pp. 893--900.

\bibitem{nesh15}
K.~Neshatpour, M.~Malik, and H.~Homayoun, ``Accelerating machine learning
  kernel in hadoop using fpgas,'' in \emph{2015 15th IEEE/ACM International
  Symposium on Cluster, Cloud and Grid Computing}, 2015, pp. 1151--1154.

\bibitem{alha15}
A.~Alhamali, N.~Salha, R.~Morcel, M.~Ezzeddine, O.~Hamdan, H.~Akkary, and
  H.~Hajj, ``Fpga-accelerated hadoop cluster for deep learning computations,''
  in \emph{2015 IEEE International Conference on Data Mining Workshop (ICDMW)},
  2015, pp. 565--574.

\bibitem{du19}
H.~Du, J.~Zhang, J.~Zhang, S.~Sha, and Z.~Tang, ``The library for hadoop
  deflate compression based on fpga accelerator,'' in \emph{2019 Computing,
  Communications and IoT Applications (ComComAp)}, 2019, pp. 282--287.

\bibitem{prit20}
P.~Narayanan, C.~E. Cox, A.~Asseman, N.~Antoine, H.~Huels, W.~W. Wilcke, and
  A.~S. Ozcan, ``Overview of the ibm neural computer architecture,'' 2020.

\bibitem{chun95}
C.-C. Yeh, C.-H. Wu, and J.-Y. Juang, ``Design and implementation of a
  multicomputer interconnection network using fpgas,'' in \emph{Proceedings
  IEEE Symposium on FPGAs for Custom Computing Machines}, 1995, pp. 56--60.

\bibitem{asse21}
\BIBentryALTinterwordspacing
A.~Asseman, N.~Antoine, and A.~S. Ozcan, ``Accelerating deep neuroevolution on
  distributed fpgas for reinforcement learning problems,'' \emph{ACM Journal on
  Emerging Technologies in Computing Systems}, vol.~17, no.~2, p. 1–17, Apr
  2021. [Online]. Available: \url{http://dx.doi.org/10.1145/3425500}
\BIBentrySTDinterwordspacing

\bibitem{theo14}
A.~Theodore~Markettos, P.~J. Fox, S.~W. Moore, and A.~W. Moore, ``Interconnect
  for commodity fpga clusters: Standardized or customized?'' in \emph{2014 24th
  International Conference on Field Programmable Logic and Applications (FPL)},
  2014, pp. 1--8.

\bibitem{chun15}
C.-C. Chung, C.-K. Liu, and D.-H. Lee, ``Fpga-based accelerator platform for
  big data matrix processing,'' in \emph{2015 IEEE International Conference on
  Electron Devices and Solid-State Circuits (EDSSC)}, 2015, pp. 221--224.

\bibitem{chun17}
C.-C. Chung and Y.-H. Wang, ``Hadoop cluster with fpga-based hardware
  accelerators for k-means clustering algorithm,'' in \emph{2017 IEEE
  International Conference on Consumer Electronics - Taiwan (ICCE-TW)}, 2017,
  pp. 143--144.

\bibitem{owai18}
M.~Owaida and G.~Alonso, ``Application partitioning on fpga clusters: Inference
  over decision tree ensembles,'' in \emph{2018 28th International Conference
  on Field Programmable Logic and Applications (FPL)}, 2018, pp. 295--2955.

\bibitem{fisc20}
G.~Fiscaletti, M.~Speziali, L.~Stornaiuolo, M.~D. Santambrogio, and D.~Sciuto,
  ``Bnnsplit: Binarized neural networks for embedded distributed fpga-based
  computing systems,'' in \emph{2020 Design, Automation Test in Europe
  Conference Exhibition (DATE)}, 2020, pp. 975--978.

\end{thebibliography}
